Small lot size lithography bays

ABSTRACT

In a first aspect, a small lot size lithography bay is provided. The small lot size lithography bay includes (1) a plurality of lithography tools; and (2) a small lot size transport system adapted to transport small lot size substrate carriers to the lithography tools. Each small lot size substrate carrier is adapted to hold fewer than 13 substrates. Numerous other aspects are provided.

This application claims priority to U.S. Provisional Patent ApplicationSer. No. 60/578,792, filed Jun. 10, 2004. This application is also acontinuation-in-part of and claims priority to U.S. patent applicationSer. No. 10/764,620, filed Jan. 26, 2004, which claims priority to U.S.Provisional Application Ser. No. 60/443,001, filed Jan. 27, 2003. Thecontent of each of the above applications is hereby incorporated byreference herein in its entirety.

CROSS REFERENCE TO RELATED APPLICATIONS

The present application is related to the following commonly-assigned,co-pending U.S. patent applications, each of which is herebyincorporated by reference herein in its entirety:

-   U.S. patent application Ser. No. 10/650,310, filed Aug. 28, 2003 and    titled “System For Transporting Substrate Carriers” (Attorney Docket    No. 6900);-   U.S. patent application Ser. No. 10/650,312, filed Aug. 28, 2003 and    titled “Method and Apparatus for Using Substrate Carrier Movement to    Actuate Substrate Carrier Door Opening/Closing” (Attorney Docket No.    6976);-   U.S. patent application Ser. No. 10/650,481, filed Aug. 28, 2003 and    titled “Method and Apparatus for Unloading Substrate Carriers from    Substrate Carrier Transport Systems” (Attorney Docket No. 7024);-   U.S. patent application Ser. No. 10/650,479, filed Aug. 28, 2003 and    titled “Method and Apparatus for Supplying Substrates to a    Processing Tool” (Attorney Docket No. 7096);-   U.S. patent application Ser. No. 60/407,452, filed Aug. 31, 2002 and    titled “End Effector Having Mechanism For Reorienting A Wafer    Carrier Between Vertical And Horizontal Orientations” (Attorney    Docket No. 7097/L);-   U.S. patent application Ser. No. 60/407,337, filed Aug. 31, 2002,    and titled “Wafer Loading Station with Docking Grippers at Docking    Stations” (Attorney Docket No. 7099/L);-   U.S. patent application Ser. No. 10/650,311, filed Aug. 28, 2003 and    titled “Substrate Carrier Door having Door Latching and Substrate    Clamping Mechanism” (Attorney Docket No. 7156);-   U.S. patent application Ser. No. 10/650,480, filed Aug. 28, 2003 and    titled “Substrate Carrier Handler That Unloads Substrate Carriers    Directly From a Moving Conveyor” (Attorney Docket No. 7676);-   U.S. patent application No. 10/764,982, filed Jan. 26, 2004 and    titled “Methods and Apparatus for Transporting Substrate Carriers”    (Attorney Docket No. 7163);-   U.S. patent application No. 10/764,820, filed Jan. 26, 2004, and    titled “Overhead Transfer Flange and Support for Suspending    Substrate Carrier” (Attorney Docket No. 8092);-   U.S. Provisional patent application Ser. No. 60/443,115, filed Jan.    27, 2003, and titled “Apparatus and Method for Storing and Loading    Wafer Carriers” (Attorney Docket No. 8202);-   U.S. patent application Ser. No. 10/987,956, filed Nov. 12, 2004,    and titled “Calibration of High Speed Loader to Substrate Transport    System” (Docket No. 8158); and-   U.S. Provisional patent application Ser. No. 60/520,035, filed Nov.    13, 2003, and titled “Apparatus and Method for Transporting    Substrate Carriers Between Conveyors” (Docket No. 8195/L).

FIELD OF THE INVENTION

The present invention relates generally to semiconductor devicefabrication systems, and more particularly to small lot size lithographybays.

BACKGROUND OF THE INVENTION

Manufacturing of semiconductor devices typically involves performing asequence of procedures with respect to a substrate such as a siliconsubstrate, a glass plate, etc. These steps may include polishing,deposition, etching, photolithography, heat treatment, and so forth.Usually a number of different processing steps may be performed in asingle processing system or “tool” which includes a plurality ofprocessing chambers. However, it is generally the case that otherprocesses are required to be performed at other processing locationswithin a fabrication facility, and it is accordingly necessary thatsubstrates be transported within the fabrication facility from oneprocessing location to another. Depending on the type of semiconductordevice to be manufactured, there may be a relatively large number ofprocessing steps required, to be performed at many different processinglocations within the fabrication facility.

It is conventional to transport substrates from one processing locationto another within substrate carriers such as sealed pods, cassettes,containers and so forth. It is also conventional to employ automatedsubstrate carrier transport devices, such as automatic guided vehicles,overhead transport systems, substrate carrier handling robots, etc., tomove substrate carriers from location to location within the fabricationfacility or to transfer substrate carriers from or to a substratecarrier transport device.

For an individual substrate, the total fabrication process, fromformation or receipt of the virgin substrate to cutting of semiconductordevices from the finished substrate, may require an elapsed time that ismeasured in weeks or months. In a typical fabrication facility, a largenumber of substrates may accordingly be present at any given time as“work in progress” (WIP). The substrates present in the fabricationfacility as WIP may represent a very large investment of workingcapital, which tends to increase the per substrate manufacturing cost.

When a fabrication facility is fully operational, reducing WIP decreasescapital and manufacturing costs. WIP reduction may be achieved, forexample, by reducing the average total elapsed time for processing eachsubstrate within the fabrication facility.

Previously incorporated U.S. patent application Ser. No. 10/650,310,filed Aug. 28, 2003, titled “System for Transporting SemiconductorSubstrate Carriers” (Attorney Docket No. 6900), discloses a substratecarrier transport system that includes a conveyor for substrate carriersthat is intended to be constantly in motion during operation of thefabrication facility which it serves. The constantly moving conveyor isintended to facilitate transportation of substrates within thefabrication facility so as to reduce the total “dwell” or “cycle” timeof each substrate in the fabrication facility. WIP reduction thereby maybe achieved as less WIP is needed to produce the same factory output.

SUMMARY OF THE INVENTION

In a first aspect of the invention, a method is provided that includesthe steps of (1) storing substrates in a plurality of small lot sizesubstrate carriers, each adapted to hold less than 13 substrates; and(2) transporting at least one of the small lot size substrate carrierswithin a lithography bay of a semiconductor device fabrication facility.

In a second aspect of the invention, a small lot size lithography bay isprovided. The small lot size lithography bay includes (1) a plurality oflithography tools; and (2) a small lot size transport system adapted totransport small lot size substrate carriers to the lithography tools.Each small lot size substrate carrier is adapted to hold fewer than 13substrates. Numerous other aspects are provided.

Other features and aspects of the present invention will become morefully apparent from the following detailed description, the appendedclaims and the accompanying drawings.

BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is an exemplary graph of semiconductor device fabricationfacility (FAB) cycle time or WIP versus facility output for large andsmall lot size substrate carriers.

FIG. 2 is a schematic diagram of an exemplary small lot size (SLS)semiconductor device manufacturing facility provided in accordance withthe present invention.

FIG. 3 is a top plan view of an exemplary small lot size lithography bayprovided in accordance with the present invention.

FIG. 4 is a flowchart of an exemplary method for operating the small lotsize lithography bay of FIG. 3.

DETAILED DESCRIPTION

The present invention relates to reducing cycle time in a semiconductordevice fabrication facility, such as in a lithography portion (bay) of asemiconductor device fabrication facility. Cycle time is reduced byreducing lot size and/or by employing a high speed transport system totransport small lot size substrate carriers between processing,metrology and/or inspection tools of the lithography bay.

As used herein, a “small lot” size substrate carrier refers to asubstrate carrier that is adapted to hold significantly fewer substratesthan a conventional “large lot” size substrate carrier which typicallyholds 13 or 25 substrates. As an example, in one embodiment, a small lotsize substrate carrier is adapted to hold 5 or less substrates. Othersmall lot size substrate carriers may be employed (e.g., small lot sizecarriers that hold 1, 2, 3, 4, 5, 6, 7 or more substrates, butsignificantly less than that of a large lot size substrate carrier). Forexample, in one embodiment, each small lot size substrate carrier mayhold too few substrates for human transport of substrates carriers to beviable within a semiconductor device manufacturing facility.

Cycle Time Reduction

In a conventional semiconductor device fabrication facility, substratesare typically transported in substrate carriers that hold 25 substratesper carrier. In such cases, the fabrication facility is said to employ alot size of 25 substrates.

The cycle time (CT) to process a substrate lot can be determined usingthe following formula:CT=lot processing time+transit time+tool wait timeLot processing time (LPT) is the time required to process each substratein a lot (e.g., 25 substrates for a standard lot size). Lot processingtime includes, for example, the time required to transfer each substratefrom its substrate carrier to a processing chamber of a processing tool,process the substrate and return the substrate to its substrate carrier.Transit time (TT) refers to the time required to transfer a lot (e.g., asubstrate carrier) from one processing tool to another processing tool(e.g., the time between when a substrate carrier is closed at a firsttool and opened at a second tool).

Tool wait time (TWT) refers to the time that a lot must wait at aprocessing tool before substrates in the lot are processed at the tool.Assuming each lot is processed immediately after arriving at eachprocessing tool, the tool wait time is zero, and the minimum cycle time(CTMIN) becomes:,CTMIN=lot processing time+transit timeFrom the above formula, it is clear that for a fixed transit time, cycletime increases with lot size (because each substrate within a lotgenerally must wait for all other substrates in the lot to be processedbefore the lot may be transferred to a new processing tool).Accordingly, by employing small lot sizes (e.g., substrate carriers thathold fewer substrates), cycle time can be reduced as long as transittime is not significantly increased. By using a lot size of 1 substrate(e.g., a substrate carrier that holds only one substrate carrier)without increasing transit time, cycle time may be minimized because nosubstrate must wait for other substrates to be processed before beingtransported to a new processing tool for its next processing step.

As an example, assume that for 130 nanometer logic, process time is 2days and transit time is 2 days. Further assume for this example that,for a 25 substrate lot size, the time that each substrate must wait forother substrates in its lot to be processed is 10 days. Minimum cycletime for the 25 substrate lot (CTMIN25) becomes: $\begin{matrix}{{{CT}\quad{MIN}\quad 25} = {{{process}\quad{time}} + {{lot}\quad{wait}\quad{time}} + {{transit}\quad{time}}}} \\{= {{2\quad{days}} + {10\quad{days}} + {2\quad{days}}}} \\{= {14\quad{days}}}\end{matrix}$However, assuming a single substrate lot size is employed, and thattransit time remains fixed, the minimum cycle time for the 1 substratelot (CTMIN1) becomes: $\begin{matrix}{{{CT}\quad{MIN}\quad 1} = {{{process}\quad{time}} + {{lot}\quad{wait}\quad{time}} + {{transit}\quad{time}}}} \\{= {{2\quad{days}} + {0\quad{days}} + {2\quad{days}}}} \\{= {4\quad{days}}}\end{matrix}$Accordingly, by employing a single substrate lot size, minimum cycletime is reduced by 73%.

From a cycle time perspective, the use of single substrate carriers mayappear to be preferred. However, other issues such as providingsufficient storage at each processing tool, scheduling lots, processcontrol strategies or the like, may make the use of lots sizes greaterthan 1 substrate desirable. For example, it may be desirable to usesmall lot sizes having 2, 3, 4, 5, 6 or more substrates. Note that theuse of such small lot sizes still provides a significant reduction incycle time compared to conventional large lot sizes.

Cycle time and its affects on fabrication facilities are described belowwith reference to FIGS. 1 and 2. In particular, FIGS. 1 and 2 describemanaging work in progress (WIP) and cycle time through the use of hotlots. Manipulating cycle time within a small lot size lithography bay isdescribed below with reference to FIGS. 3 and 4.

Cycle Time Versus WIP in Fabrication Facilit

As stated, for a fully operational fabrication facility, reducing WIPdecreases capital and manufacturing costs. However, reduced WIP also mayplace a semiconductor device manufacturing facility as risk. Forinstance, when a processing tool within a fabrication line becomesnon-operational (e.g., “goes down” due to equipment failure, forperiodic maintenance or cleaning, etc.), WIP may provide sufficientsubstrate buffering to allow continued factory output until thenon-operational tool becomes operational (e.g., is brought “back online”). Insufficient WIP, on the other hand, may cause the manufacturingline to sit idle.

In general, when average cycle time per substrate is reduced within asemiconductor device manufacturing facility, a corresponding reduction(e.g., a similar, proportional or otherwise-related reduction) in workin progress is realized as, on average, more substrates may be movedthrough the facility. In accordance with at least one embodiment of thepresent invention, average cycle time per substrate may be maintainedapproximately constant by increasing the cycle time of low prioritysubstrates while decreasing the cycle time of high priority substrates.(Note that low and high priority substrates may be distributed over arange of priority values, such as from priority 1 to priority 100 orover some other suitable priority range). In this manner, therelationship between the cycle time of high priority substrates and workin progress may be decoupled (e.g., reduced or eliminated) such that adecrease in high priority substrate cycle time does not produce acorresponding decrease in work in progress within a semiconductor devicefabrication facility employing the present invention.

To reduce average cycle time in accordance with the present invention,“small lot” size substrate carriers are employed with a high speedsubstrate carrier transport system. The high speed substrate carriertransport system may transport substrate carriers within a semiconductordevice fabrication facility at a significantly higher speed thanconventional transport systems (as described below). Accordingly, anygiven substrate carrier may be routed through the facility faster.

Use of Small Lot Sizes During Semiconductor Device Manufacturing

FIG. 1 is an exemplary graph of semiconductor device fabricationfacility (FAB) cycle time or WIP versus facility output for large andsmall lot size substrate carriers. With reference to FIG. 1, curve 100illustrates cycle time or WIP versus facility output for a typicalsemiconductor device fabrication facility configured to transport largelot size substrate carriers. Curve 102 illustrates cycle time or WIPversus facility output for a semiconductor device fabrication facilityconfigured to transport small lot size substrate carriers in accordancewith the present invention.

Curve 100 illustrates how facility output increases with WIP. As WIPcontinues to increase, facility output also increases. Eventually largeWIP increases are required for relatively small output gains.Accordingly, to provide facility output predictability, large lot sizefacilities typically operate near the knee of curve 100 (as representedby reference numeral 104). At such a location, facility output is nearits maximum and small increases or decreases in cycle time or WIP havelittle effect on facility output.

Curve 102 illustrates how use of small lot size substrate carriers witha high speed substrate carrier transport system (described below) canaffect WIP and/or facility output. For example, as shown in FIG. 1,curve 102 is shifted to the right and down relative to curve 100. Such ashift indicates that the same level of facility output can be maintainedwith less WIP (as indicated by reference numeral 106). Alternatively, ifthe same level of WIP is desired within the small lot size facility asis present in the large lot size facility governed by curve 100, outputwithin the small lot size facility may be increased (as in indicated byreference numeral 108). In at least one embodiment of the invention,factory output is increased through a slight reduction in WIP, as shown,for example, by reference numeral 110. Other operating points along thecurve 102 also may be employed.

Selection of the “optimal” operating point on the curve 102 depends onnumerous factors. For example, some products have long product lifecycles and relatively stable prices (e.g., devices for embeddedapplications such as devices used within industrial equipment or otherlong-product-life applications). Devices used in these products can befabricated and stored in inventory for sale at later dates with littlefinancial risk. Substrates for such devices may be classified as lowpriority and used to fill capacity of the fabrication facility. Asinventories become depleted, the priority for these substrates may beincreased as required to meet committed business arrangements (e.g.,lead time, stocking levels, etc.).

Substrates for devices used in mature, commodity products, such as DRAMproducts that have been on the market for 3-4 years, also are candidatesfor low priority substrates. Yields for these devices are generallyhigh, and the commodity nature of the product employing the devicesensures that a market exists. Accordingly, inventory obsolescence isunlikely, but profit potential is relatively low. However, suchsubstrates may provide capacity fill in to ensure that equipment iscontinually utilized to build revenue generating product.

New products characteristically provide high gross margins. Substratesfor devices used in such products may be given a high priority. In thismanner, the fabrication facility may increase profit per substrate bybiasing production to higher gross margin products. New products oftenexperience rapid selling erosion due to competition and marketingstrategies that push lower pricing to expand market penetration. Placinghigher priority on these products and selectively reducing themanufacturing cycle time may increase the product volume that can besold at higher gross margin. Substrates for devices used in productswith a short-life cycle also may be given a high priority. Short lifecycle products may include, for example, customized devices for consumerelectronics such as specialized memory devices for digital cameras,video game controllers, cell phone components, etc. More risk exists increating an inventory of these type of devices as prices may droprapidly as they approach obsolescence.

Special order devices or devices under development, undergoing changesor undergoing special quality tests, are often handled specially infabrication facilities; and substrates used for the fabrication of suchdevices are often referred to as “hot lots” or “super hot lots”. Hotlots are often prioritized to be moved to the front of a queue for eachprocess step. Super hot lots may be given higher priority and equipmentmay be reserved, or kept idle, waiting for the super hot lot substratesto arrive. In a conventional fabrication facility that employs 13 or 25substrates per lot, the use of hot lots and super hot lots may causesignificant disruptions in process flow. However, as described furtherbelow, in a small lot size fabrication facility provided in accordancewith the present invention, special order and other similar devices maybe interlaced into the existing production flow with little loss of toolutilization. Substrates used for the fabrication of such devices may begiven the highest priority within the fabrication facility.

Exemplary Small Lot Size Semiconductor Device Manufacturing Facility

FIG. 2 is a schematic diagram of an exemplary small lot size (SLS)semiconductor device manufacturing facility 200 provided in accordancewith the present invention. With reference to FIG. 2, the SLS facility200 includes a high speed substrate carrier transport system 202 adaptedto deliver small lot size substrate carriers to a plurality ofprocessing tools 204. Local storage or buffering 206 is provided at ornear each processing tool 204 for local storage of WIP. Additional,volume storage or buffering 208 also may be provided (e.g., volumestocking for accommodating peaks in WIP that develop duringmanufacturing and for longer term storage of WIP).

Carrier opening devices 210 are provided at each processing tool 204 foropening small lot size substrate carriers so that substrates containedtherein may be extracted therefrom, processed and/or returned thereto.Mechanisms (not separately shown) are provided for transferring smalllot size substrate carriers from the high speed transport system 202 tothe carrier opening devices 210 of each processing tool 204 as describedfurther below.

An automation communications and/or software system 212 is provided forcontrolling operation of the fabrication facility 200, and may include,for example, a manufacturing execution system (MES), a Material ControlSystem (MCS), a Scheduler or the like. A separate delivery systemcontroller 214 for controlling delivery of small lot size substratecarriers to the processing tools 204 is shown in FIG. 2. It will beappreciated that the delivery system controller 214 may be part of theautomation communications and/or software system 212; and/or that aseparate MES, MCS or Scheduler may be employed.

Most processing tools, even in a large lot size fabrication facility,process substrates in small batches (e.g., by processing one or twosubstrates per processing chamber at a time). However, some processingtools, such as furnaces or wet processing tools, process substrates inlarge batch sizes (e.g., from about 25 to 200 substrates per batch).Accordingly, the small lot size fabrication facility 200 may be adaptedto accommodate the delivery, storage and operating requirements of largebatch size processing tools. One such exemplary large batch sizeprocessing tool is indicated by reference numeral 216 in FIG. 2.

Many large batch size processing tools utilize an equipment front endmodule (EFEM), not separately shown, to remove substrates directly froma large lot size carrier with a robot blade (e.g., one substrate at atime). Individual substrates then are transferred by the processing toolto a process chamber as required to build the necessary large batch forprocessing. By providing local storage of small lot size substratecarriers at such a processing tool, a large substrate batch may be builtusing an equipment front end module of a large batch size processingtool within the small lot size fabrication facility 200.

Other large batch size processing tools pull complete large lot sizecarriers into an internal buffer, or simultaneously pull multiplesubstrates from a large lot size substrate carrier into a internalbuffer. For such tools, a sorter module 218 that moves substrates fromsmall lot size carriers to large lot size carriers may be employedwithin the small lot size fabrication facility 200.

As stated, the high speed transport system 202 is adapted to deliversmall lot size substrate carriers to the plurality of processing tools204. Such a system preferably has a move rate capacity of at least 2times the average rate required for normal production capacity (e.g., tobe able to respond to peaks in move rate requirements that occur duringnormal production). Additionally, the system preferably has the abilityto re-direct, re-route or re-move substrates to different processingtools in response to factory anomalies, excursions and/or manufacturingprocessing changes (e.g., un-scheduled maintenance, priority changes,manufacturing yield problems, etc.).

U.S. patent application Ser. No. 10/650,310, filed Aug. 28, 2003 (the'310 Application), discloses a substrate carrier transport system (e.g.,a conveyor) that may be used as the small lot size substrate carriertransport system 202. The transport system of the '310 Applicationcontinues to move during substrate carrier unloading and loadingoperations. A load/unload mechanism may be associated with eachprocessing tool or group of processing tools and operate to load and/orunload substrate carriers from or onto the transport system while thetransport system is moving. Each load/unload mechanism may include aload/unload member that is moved during a load or unload operation so asto substantially match the velocity at which the transport systemcarries substrate carriers. The load and/or unload member is thusadapted to ensure gentle substrate/substrate carrier handling. Thetransport system of the 310′ Application may be operated atsignificantly higher speeds than conventional large lot size transportsystems; and can easily accommodate re-directing, re-routing and/orre-moving of substrates to different processing tools in response tofactory anomalies, excursions and/or manufacturing processing changes.Other substrate carrier transport systems may be similarly employed.

One particular embodiment of a suitable high speed transport system isdescribed in U.S. patent application Ser. No. 10/764,982, filed Jan. 26,2004 (the '982 Application). The '982 Application describes a conveyorsystem that may include a ribbon of stainless steel or a similarmaterial that forms a closed loop within at least a portion of asemiconductor device manufacturing facility and that transportssubstrate carriers therein. By orienting the ribbon so that a thickportion of the ribbon resides within a vertical plane and a thin portionof the ribbon resides within a horizontal plane, the ribbon is flexiblein the horizontal plane and rigid in the vertical plane. Such aconfiguration allows the inventive conveyor to be constructed andimplemented inexpensively. For example, the ribbon requires littlematerial to construct, is easy to fabricate and, due to its verticalrigidity/strength, can support the weight of numerous substrate carrierswithout supplemental support structure (such as rollers or other similarmechanisms used in conventional, horizontally-oriented belt-typeconveyor systems). Furthermore, the conveyor system is highlycustomizable because the ribbon may be bent, bowed or otherwise shapedinto numerous configurations due to its lateral flexibility.

As shown in FIG. 2, the SLS fabrication facility 200 may includeadditional high speed transport systems as indicated by referencenumerals 202′ and 202″. Few or more than three such transport systemsmay be employed. Additional high speed transport systems may beemployed, for example, to transfer small lot size substrate carriers toother portion of a fabrication facility, such as to equipment thatprocesses substrates stored in large lot size substrate carriers,different physical areas of the fabrication facility (such as anexpanded area of the facility), etc. One or more transfer mechanisms 220may be employed to transfer substrate carriers between the high speedtransport systems 202, 202′, and 202″ and/or to provide additionalsubstrate carrier storage. In at least on embodiment of the invention,one or more substrate carrier handlers and a rotary substrate carrierstage may be employed to remove a substrate carrier from a first highspeed transport system (e.g., high speed transport system 202 in FIG. 2)and transfer the substrate carrier to a second high speed transportsystem (e.g., high speed transport system 202′ in FIG. 2) or vice versa.Such a system and method is described in U.S. Provisional PatentApplication Ser. No. 60/520,035, filed Nov. 13, 2003 (Docket No.8195/L).

To avoid depletion of substrate carriers from the high speed transportsystem 202, each processing tool 204 may include local storage forbuffering or storing WIP (as stated). Stand-alone operation of aprocessing tool without needing the high speed transport system 202 todeliver substrates to the tool thereby may be provided. Because manyconventional processing tools accommodate at least two large lot size(e.g., 25) substrate carriers, in at least one embodiment of theinvention, local storage at or near each processing tool 204 is adaptedto store a similar number of substrates by storing numerous small lotsize substrate carriers at or near each processing tool (e.g., about 50or more small lot size carriers in one embodiment). Other or differentnumbers of substrate carriers also may be stored at or near eachprocessing tool 204 (e.g., fewer than 50, more than 50, etc.).

U.S. Provisional Application Ser. No. 60/443,115, filed Jan. 27, 2003,discloses a high-speed bay-distributed stocker (HSBDS) having a chassiswhich is notably longer in a direction of travel of a high speedtransport system it serves, as compared to conventional bay-distributedstockers. The HSBDS features a high-speed substrate carrier handleradapted to load substrate carriers onto and unload substrate carriersfrom a high speed transport system. The HSBDS also includes additionalcolumns of substrate carrier storage shelves for providing additionalsubstrate buffering. Other systems for providing local storage may beemployed (e.g., distributed stockers, field stockers, overhead/ceilingmounted tables or shelves, etc).

Volume storage or buffering 208 may provide volume stocking foraccommodating peaks in WIP that develop during manufacturing and forlonger term storage of WIP. For example, orders placed on hold,non-product substrates, and the like may be placed in volume storage orbuffering. Selection of the capacity of such volume storage or bufferingis driven by fabrication facility requirements.

Volume storage or buffering 208 may include, for example, small lot sizestockers along a high speed transport loop, large lot size stockers onthe high speed transport path or along a slower transport path (notshown), another type of high density storage, distributed stockers,field stockers, overhead and/or ceiling mounted tables or shelves, etc.Substrates stored in small lot size substrate carriers may betransferred to large lot size carriers via a sorter, and subsequentlyplaced in a high density storage location.

In at least one embodiment of the invention, work in progress that islow usage (e.g., inactive WIP such as substrates put on engineeringhold, test substrates, non-production substrates, substrates built forlong term hold, etc.) may be stored in large lot size substrate carriersthat have greater storage capacity (as the cost of storing substrateswithin such high density carriers is generally cheaper than using smalllot size carrier storage). For example, low use WIP may be transferredfrom small lot size carriers into large lot size carriers (e.g., via asorter) and stored in volume stockers. If the low use WIP is not to beprocessed within a predetermined time period (e.g., 5 days or some othertime period), the WIP may be transferred from small lot size carriers tolarge lot size carriers (e.g., carriers that store 13 or 25 substrates)and transferred to another location within the fabrication facility 200.For example, volume storage 208′ may include large lot size volumestockers adapted to store low usage WIP at a location away from the mainprocessing area of the fabrication facility 200.

During loading and unloading of substrate carriers at a processing tool204, communication between the processing tool 204 and the fabricationfacility 200 may provide lot identification information, processingparameters, tool operating parameters, processing instructions, or thelike. The automation communications and/or software system 212 isdesigned to handle this and other communications. Preferably suchcommunication is rapid enough so as not to delay substrate processing.For example, a typical requirement for loading of a substrate carrier ata factory interface of a processing tool may be less than about 200seconds, and in some cases less than 30 seconds.

In at least one embodiment of the invention, the automationcommunication and/or software system 212 is adapted to performsubstrate-level tracking (as opposed to carrier level tracking typicallyemployed in a large lot size environment) and may reference substratesgrouped as a lot if necessary. Such a substrate-based approach mayincrease performance of the fabrication facility 200 and may preventsoftware restrictions from negating the benefits of small lot sizemanufacturing.

The carrier opening devices 210 at each processing tool 204 (for openingsmall lot size substrate carriers so that substrates contained thereinmay be extracted therefrom, processed and/or returned thereto)preferably employ industry standard interfaces (e.g., SEMI standards) tominimize facility-wide implementation costs. Alternative carrier openingmechanisms may be employed. For example, U.S. patent application Ser.No. 10/650,311, filed Aug. 28, 2003, discloses a door latching mechanismof a substrate carrier that is automatically unlatched by interaction ofthe latching mechanism with an actuator mechanism at a substratetransfer location (e.g., of a processing tool that may be used, forexample, during semiconductor device manufacturing). The same actuatormechanism also may release a substrate clamping mechanism that may bepart of the substrate carrier (e.g., and that secures a substrate storedby the substrate carrier during transport). Likewise, U.S. patentapplication Ser. No. 10/650,312, filed Aug. 28, 2003, describes the useof movement of a substrate carrier toward a port of a substrate transferlocation to cause the door of the substrate carrier to open. Movement ofthe substrate carrier away from the port of the substrate transferlocation causes the door of the substrate carrier to close. Othercarrier opening methods and apparatus may be employed.

Because of the relatively low move rates employed within large lot sizefabrication facilities, human operators may move lots between processingtools when needed (e.g., when an automated transport system fails). Forsmall lot size manufacturing, the required move rate is so large thatuse of human operators is typically impractical. As a result, redundantsystems (other than human operators) may be employed to ensure properfacility operation. Such redundant systems may include, for example,additional control system computers, software databases, automatedtransport systems and the like (not separately shown).

In at least one embodiment of the invention, the small lot sizefabrication facility 200 may include, for example, the ability toinstall and set up new processing tools while the high speed transportsystem 202 is operating (e.g., is in motion and/or servicing othertools). U.S. patent application Ser. No. 10/987,956, filed Nov. 12, 2004(8158), describes methods by which a high speed substrate carriertransfer station (for loading substrate carriers onto and for removingsubstrate carriers from a high speed substrate carrier transport system)may be aligned and calibrated to a high speed substrate carriertransport system while the transport system is in motion. The substratecarrier hand-off function of the transfer station may then be tested,and the high-speed transfer station placed into service. Othermethods/systems also may be employed.

Use of a small lot size fabrication facility such as that describedabove with reference to FIG. 2 provides numerous advantages overconventional large lot size fabrication facilities. For example, a smalllot size fabrication facility may provide greater versatility. Asdescribed with reference to FIG. 1, for an equivalent set of processingtools, a small lot size fabrication facility may be operated at (1)equivalent output with reduced cycle time; (2) equivalent cycle timewith increase factory output; or (2) at some point therebetween. Thefacility operating conditions (versus a large lot size baseline) may betuned based on business needs or other conditions to place priority oneither cycle time reduction or increased capacity. Further, through useof the high speeds substrate carrier transport system, special order andother similar devices may be interlaced into the existing productionflow with little loss of tool utilization. Hot lots and/or super hotlots typically may be processed within the small lot size fabricationfacility with less impact to fabrication facility output rate. Lessexcess capacity thereby may be required to process hot lots and/or superhot lots.

The foregoing description discloses only exemplary embodiments of theinvention. Modifications of the above disclosed apparatus and methodwhich fall within the scope of the invention will be readily apparent tothose of ordinary skill in the art. For instance, other configurationsfor a small lot size fabrication facility may be employed such asdifferent processing tool, storage device and/or transport systemlayouts and/or types, more or fewer processing tools, storage devicesand/or transport systems, etc. In at least one embodiment, a substratecarrier cleaner 222 may be provided for cleaning small lot sizesubstrate carriers. In this manner substrate carriers may be cleaned soas to prevent cross-contamination of incompatible processes. A small lotsize semiconductor device manufacturing facility such as that shown inFIG. 2 may form a part or subset of a larger semiconductor devicemanufacturing facility (e.g., that may include one or more other smalllot size semiconductor device manufacturing facilities and/or one ormore large lot size semiconductor device manufacturing facilities). Forinstance, a small lot size semiconductor device manufacturing facilitymay be employed to reduce the cycle time of all or a portion of aninterconnect formation phase of device production. That is, a small lotsize semiconductor device manufacturing facility provided in accordancewith the invention may be employed to selectively accelerate a portionof device processing time. As another example, in a lithography bay, asmall lot size fabrication module may be used to improve the cycle timefor metrology, substrate re-works, etc.

The automation communication and/or software system 212, the deliverysystem controller 214 and/or any other controller may be programmed orotherwise configured to perform numerous WIP management functions. Forinstance, in at least one embodiment of the invention, such a systemand/or controller may be configured to maintain a predetermined work inprogress level within the small lot size semiconductor devicemanufacturing facility 200 by (1) increasing an average cycle time oflow priority substrates within the small lot size semiconductor devicemanufacturing facility 200; and (2) decreasing an average cycle time ofhigh priority substrates within the small lot size semiconductor devicemanufacturing facility 200 so as to approximately maintain apredetermined work in progress level within the small lot sizesemiconductor device manufacturing facility 200. In another embodimentof the invention, the system and/or controller may be configured to (1)store small lot size substrate carriers containing low prioritysubstrates within small lot size substrate carrier storage locations ofone or more of the processing tools 204; and (2) process high prioritysubstrates available to the one or more of the processing tools 204ahead of the stored low priority substrates so as to reduce cycle timeof high priority substrates without correspondingly reducing work inprogress within the small lot size semiconductor device manufacturingfacility 200.

In yet another embodiment of the invention, such a system and/orcontroller may be configured to (1) store small lot size substratecarriers containing low priority substrates and small lot size substratecarriers containing high priority substrates within small lot sizesubstrate carrier storage locations of one or more of the processingtools 204; and (2) prior to processing within the one or more of theprocessing tools 204, store high priority substrates for a shorter timeperiod on average than low priority substrates so as to reduce cycletime of high priority substrates without correspondingly reducing workin progress within the small lot size semiconductor device manufacturingfacility 200.

In a further embodiment of the invention, such a system and/orcontroller may be configured to process high and low priority substrateswithin the small lot size semiconductor device manufacturing facility200 with different cycle times while keeping average cycle time and workin progress at approximately the same level as average cycle time andwork in progress of a large lot size semiconductor device manufacturingfacility.

In another embodiment of the invention, such a system and/or controllermay be configured to process substrates within the small lot sizesemiconductor device manufacturing facility 200 with a lower averagecycle time than a large lot size semiconductor device manufacturingfacility while maintaining approximately the same overall output as thelarge lot size semiconductor device manufacturing facility.

In yet a further embodiment of the invention, such a system and/orcontroller may be configured to process substrates within the small lotsize semiconductor device manufacturing facility 200 with approximatelythe same average cycle time and work in progress as a large lot sizesemiconductor device manufacturing facility while increasing output ofthe small lot size semiconductor device manufacturing facility 200relative to the large lot size semiconductor device manufacturingfacility.

In still a further embodiment of the invention, such a system and/orcontroller may be configured to (1) identified work in progress that isnot to be processed within a predetermined time period; (2) transfer theidentified work in progress from small lot size substrate carriers tolarge lot size substrate carriers; and store the large lot sizesubstrate carriers in volume storage.

Small Lot Size Lithography Bay

Reduced cycle time is particularly advantageous for the lithographyportion (bay) of a semiconductor device fabrication facility. FIG. 3 isa top plan view of an exemplary small lot size lithography bay 300provided in accordance with the present invention. With reference toFIG. 3, the lithography bay 300 includes a wet clean processing tool302, a dry strip processing tool 304, a plurality of metrology andinspection tools 306-312 and a plurality of patterning tools 314-328.Note that other numbers and/or types of wet clean, dry strip, metrologyand inspection and/or patterning tools may be used. For example,separate metrology and inspection tools may be used.

The wet clean processing tool 302 and the dry strip processing tool 304are “re-work” tools adapted to perform conventional photoresist or othermask removal processes, or any other conventional processes forre-working substrates improperly processed during lithography. Forexample, the wet clean processing tool 302 may be adapted to applyphotoresist stripper or other wet chemical baths to substrates.Likewise, the dry strip processing tool 304 may employ plasma processing(e.g., ashing) to re-work substrates. Other re-work processes and/ortools may be employed within the lithography bay 300, whether in linewith the other tools 306-328 (as shown) or otherwise located.

The metrology and inspection tools 306-312 comprise conventionalmetrology and inspection tools for determining, for example, criticaldimensions, overlay accuracy, defect levels and/or defect types, etc.,of lithographically processed substrates. In at least one embodiment,the metrology and inspections tools 306-312 may include singlesubstrate, stand alone tools although batch and/or integrated metrologyand inspection tools may be used.

The patterning tools 314-328 may include conventional lithography toolsthat perform one or more of and/or any combination of resist processing,exposure, imprint, etc. For example, a patterning tool may include astand alone resist processing tool, a stand alone exposure tool, a standalone imprint tool, an integrated resist processing and exposure tool,an integrated resist processing and imprint tool, or the like. In atleast one embodiment, a resist processing tool may be integrated with orotherwise connected to an exposure tool such that (1) a substratecarrier is delivered to the resist processing tool; (2) a substrate orsubstrates are removed from the substrate carrier and resist (e.g.,photoresist) is applied to the substrate or substrates using the resistprocessing tool; (3) the substrate or substrates are transferred to theexposure tool and exposed; (4) the substrate and/or substrates arereturned to the resist processing tool and the applied resist isdeveloped; and (5) the substrate or substrates are returned to thesubstrate carrier.

The patterning tools 314-328 may be single substrate or batch tools. Asstated, other numbers and/or types of wet clean, dry strip, metrologyand inspection and patterning tools may be used. In one or moreembodiments, any exposure tools that are employed may use visible orultra-violet light to transfer circuit patterns from a mask to a resistlayer. Likewise, direct transfer, extreme ultra-violet light, e-beam orx-ray lithography tools may be employed.

In the embodiment of FIG. 3, a small lot size transport system 330 isemployed to transport small lot size substrate carriers between thetools 302-328. The small lot size transport system 330 may be similar tothe high speed transport system 202 described previously with referenceto FIG. 2, or another suitable transport system may be used. More thanone small lot size transport system may be used to transfer carriersbetween the tools 302-328.

As further shown in FIG. 3, the small lot size lithography bay 300includes one or more substrate carrier stockers or similar devices332-336. The stockers 332-336 may be employed to receive large lot sizesubstrate carriers from a conventional large lot size substrate carriertransport system 338 (such as a conventional overhead transport systemthat transports substrate carriers that hold 25 substrates). In theembodiment shown, the stockers 332-336 are adapted to receive large lotsize substrate carriers from the transport system 338, and transfersubstrates within each large lot size substrate carrier to small lotsize substrate carriers. For example, the substrates from one25-substrate substrate carrier may be removed and placed in 25one-substrate substrate carriers, 13 two-substrate substrate carriers, 9three-substrate substrate carriers, 7 four-substrate substrate carriers,5 five-substrate substrate carriers, 4 seven-substrate substratecarriers, etc. Each stocker 332-336 also may provide local storage forlarge and/or small lot size substrate carriers. Fewer or more stockers332-336 may be employed. Additionally, the small lot size lithographybay 300 may be adapted to directly receive small lot size carriers fromanother small lot size bay of a fabrication facility (rather than from alarge lot size transport system).

Operation of Small Lot Size Lithography Bay

FIG. 4 is a flowchart of an exemplary method 400 for operating the smalllot size lithography bay 300. With reference to FIG. 4, in step 401,substrates are delivered to the small lot size lithography bay 300 viathe large lot size transport system 338. For example, the large lot sizetransport system 338 may deliver substrate carriers that each hold 25substrates to the stockers 332-334. The stockers 332-334 then maytransfer substrates from large lot size carriers to small lot sizecarriers (e.g., from carriers that hold 25 substrates to carriers thathold 1, 2, 3, 4, 5, 6, etc., substrates).

Thereafter, in step 402, a first small lot size carrier is transportedto one of the patterning tools 314-328 via the small lot size transportsystem 330. Additional small lot size carriers may be transferred topatterning tools 314-328 (sequentially or in parallel).

In step 403, the substrate or substrates contained in a first small lotsize carrier are processed. Thereafter, in step 404, after the substrateor substrates of the first carrier have been processed at a patterningtool, the first small lot size carrier may be transported to one of themetrology and inspection tools 306-312 via the small lot size transportsystem 330.

In step 405, metrology and/or inspection of the substrate or substrateswithin the first small lot size carrier may be performed (e.g., todetermine critical dimension or overly accuracy, defect level or type,etc.).

In step 406, it is determined whether an error condition is detected ona substrate, such as too many defects being present, improperpatterning, etc. If an error condition is detected, in step 407, thefirst small lot size substrate carrier and its contents may be forwardedto the wet clean tool 302 and/or the dry strip tool 304 and re-worked(e.g., stripped, cleaned and prepared for processing within one or moreof the patterning tools 314-328). If no error conditions are found onthe substrate or substrates within the first small lot size carrier, instep 408, the first small lot size transport system 330 may return thecarrier to the patterning tools 314-328 for more processing within thesmall lot size lithography bay 300 or to the stockers 332-338. At thestockers 332-338, substrates may be stored and/or transferred from smalllot size carriers to large lot size carriers and transported to anotherbay of the overall fabrication facility (not shown) via the large lotsize transport system 338. The method 400 then ends.

Data from the metrology and inspection tools 306-312 may be fedback tothe patterning tools 314-328 to improve process performance (as shown inphantom by step 409 in FIG. 4). For example, if the critical dimension(CD) of a feature (e.g., of a resist layer) is too small or too large,then exposure time and/or resist processing conditions can be changed toimprove process results. Other process parameters may be similarlymanipulated. By using small lot sizes, feedback data can be provided tothe patterning tools with less time delay than when large lot sizes areused. Faster feedback data can improve processing results more quicklyand reduce scrap caused by mis-processing. This benefit is of particularimportance for the most difficult and/or most critical lithographylayers. For these layers, adjustment of process parameters based onfeedback data from processed substrates may be necessary to meet processspecifications.

The small lot size lithography bay 300 may include a controller 340(FIG. 3) adapted to control operation of the lithography bay 300 asdescribed above (e.g., by interfacing and/or controlling one or more ofthe re-work tools 302-304, the metrology and inspection tools 306-312,the patterning tools 314-328, the transport system 330 and/or thestockers 332-338). For instance, the controller 340 may be adapted to atleast initiate and/or perform one or more of the steps of method 400described previously. The controller 340 may be, for example, one ormore microprocessors and/or microcontrollers, dedicated hardware, acombination of the same, etc., and may include suitable computer programcode for controlling operation of the lithography bay 300.

The controller 340 may form part of an automation communications and/orsoftware system that is provided for controlling operation of the smalllot size lithography bay 300, and may include, for example, amanufacturing execution system (MES), a Material Control System (MCS), aScheduler or the like. A separate delivery system controller (not shown)for controlling delivery of small lot size substrate carriers to theprocessing tools 302-328 may be employed. It will be appreciated thatthe delivery system controller may be part of the automationcommunications and/or software system described above; and/or that aseparate MES, MCS or Scheduler may be employed.

Through use of small lot size carriers within the lithography bay 300,substrates may be processed within the patterning tools 314-328 andforwarded to the metrology and inspection tools 306-312 much faster thanin a conventional, large lot size lithography bay. Substrates may besent to metrology and/or inspection with little or no (in the case ofsingle substrate carriers) delay (e.g., due to other substrates in acarrier being processed). In one embodiment, for example, metrologydelays may be reduced from 200 plus substrates to less than 20substrates. Further, through use of small lot size carriers, substratesmay be transferred to different metrology tools in parallel. Forexample, when single substrate carriers are used, a first substrate maybe forwarded to a critical dimension metrology tool, a second substratemay be forwarded to an overlay metrology tool, a third substrate may beforwarded to a defect metrology tool, etc., in parallel. Similarparallel operations may be performed with small lot size carriers thatcontain more than one substrate, without the large wait-time delaysassociated with large lot size carriers.

As another example, if a new mask setup is to be employed, the setupshould be verified before processing many substrates with the mask setup(e.g., to avoid having to reprocess too many substrates if the setup isflawed). To perform setup verification, many substrates may be processedand sent to metrology. As stated, using small lot sizes significantlyreduces the time required to receive metrology and/or inspection resultsfor substrates. Accordingly, mask setup verification time is reduced. Asan alternative approach, a new mask setup may be assumed to be valid,and substrates may be processed using the setup. Any errors in the setupwill be detected following metrology on the processed substrates. Again,through use of small lot sizes, information from metrology and/orinspection is provided more rapidly so that the number of flawedsubstrates that must be re-worked (if any) is reduced. Quick, parallelfeedback of information from metrology and/or inspection tools thatperform different measurements (e.g., critical dimension, overlay,defect) may provide rapid, multiple and/or near simultaneous indicatorsof process conditions (e.g., to confirm setup, to monitor productionprocessing, to detect process deviations, etc.).

The use of the small lot size lithography bay 300, and its associatedreduced cycle time, also allows lot and substrate interlacing. Forexample, monitors and/or small lots may be interlaced without breakingthe pipeline (e.g., the continuous sequencing of substrates within aprocess tool). If the pipeline of substrates is interrupted, such as bya space or gap in the continuous sequencing of substrates in the tool,then the tool may lose efficiency and net effective utilization maydecrease. Further, monitoring may be increased and sampling improvedwithout utilization loss. Single (or small lot size) substrate re-workmay be included in the lithography bay 300.

In at least one embodiment of the invention, after substrates areexposed and/or patterned within a patterning tool 314-328, thesubstrates are moved to metrology as quickly as possible (e.g., withoutwaiting for significantly more substrates to be processed as might bethe case if a substrate carrier that holds 25 substrates were employedfor transporting substrates within the lithography bay). Also, small lotsize substrate carriers (e.g., single substrate carriers) may be sent todifferent metrology tools in parallel.

Note that stand alone metrology may be employed. Also, in someembodiments, dry strip and wet clean tools may be included in the line(as shown) to provide fast cycle time re-work when problems arediscovered. Other small lot size substrate carrier delivery systems,apparatus and/or methods than those described may be employed.

Accordingly, while the present invention has been disclosed inconnection with exemplary embodiments thereof, it should be understoodthat other embodiments may fall within the spirit and scope of theinvention, as defined by the following claims.

1. A method comprising: storing substrates in a plurality of small lotsize substrate carriers, each adapted to hold less than 13 substrates;and transporting at least one of the small lot size substrate carrierswithin a lithography bay of a semiconductor device fabrication facility.2. The method of claim 1 wherein storing substrates in a plurality ofsmall lot size substrate carriers comprises transferring substrates froma substrate carrier adapted to hold up to 25 substrates to a pluralityof small lot size substrate carriers.
 3. The method of claim 1 whereinstoring substrates in a plurality of small lot size substrate carriers,each adapted to hold less than 13 substrates, comprises: (a) receiving alarge lot size substrate carrier from a large lot size transport system,the large lot size substrate carrier adapted to store more than 13substrates; and (b) transferring substrates from the large lot sizesubstrate carrier to a plurality of small lot size substrate carriers.4. The method of claim 3 further comprising performing steps (a) and (b)at a stocker.
 5. The method of claim 4 further comprising storing theplurality of small lot size substrate carriers at the stocker.
 6. Themethod of claim 1 wherein the plurality of small lot size substratecarriers are each adapted to hold 6 or less substrates.
 7. The method ofclaim 1 wherein the plurality of small lot size substrate carriers areeach adapted to hold 5 or less substrates.
 8. The method of claim 1wherein the plurality of small lot size substrate carriers are eachadapted to hold 4 or less substrates.
 9. The method of claim 1 whereinthe plurality of small lot size substrate carriers are each adapted tohold 3 or less substrates.
 10. The method of claim 1 wherein theplurality of small lot size substrate carriers are each adapted to hold2 or less substrates.
 11. The method of claim 1 wherein the plurality ofsmall lot size substrate carriers are each adapted to hold 1 substrate.12. The method of claim 1 wherein transporting at least one of the smalllot size substrate carriers within a lithography bay of a semiconductordevice fabrication facility comprises transporting a small lot sizesubstrate carrier to a patterning tool.
 13. The method of claim 12further comprising patterning a substrate from the small lot sizesubstrate carrier using the patterning tool.
 14. The method of claim 12further comprising transferring the small lot size substrate carrier toa tool adapted to perform at least one of metrology and inspection. 15.The method of claim 14 further comprising performing at least one ofmetrology and inspection on a substrate from the small lot sizesubstrate carrier.
 16. The method of claim 15 further comprisingtransferring the small lot size substrate carrier to one or more re-worktools based on results of performing at least one of metrology andinspection.
 17. The method of claim 16 further comprising re-working asubstrate from the small lot size substrate carrier.
 18. The method ofclaim 17 wherein re-working the substrate includes at least one of wetcleaning and dry stripping the substrate.
 19. The method of claim 1further comprising transporting a plurality of small lot size substratecarriers to patterning tools in parallel.
 20. The method of claim 1further comprising transporting a plurality of small lot size substratecarriers in parallel to different metrology tools.
 21. The method ofclaim 1 wherein transporting at least one of the small lot sizesubstrate carriers within a lithography bay of a semiconductor devicefabrication facility comprises employing a continuously moving conveyorto transport the at least one small lot size substrate carrier withinthe lithography bay.
 22. A lithography bay comprising: a plurality oflithography tools; and a small lot size transport system adapted totransport small lot size substrate carriers to the lithography tools,wherein each small lot size substrate carrier is adapted to hold fewerthan 13 substrates.
 23. The lithography bay of claim 22 wherein thelithography tools comprise patterning tools and at least one ofmetrology and inspection tools.
 24. The lithography bay of claim 22wherein the lithography tools comprise at least one re-work tool. 25.The lithography bay of claim 24 wherein the at least one re-work tool isin-line with other lithography tools.
 26. The lithography bay of claim24 wherein the at least one re-work tool includes a wet cleaning tooland a dry stripping tool.
 27. The lithography bay of claim 22 furthercomprising a stocker adapted to: (a) receive a large lot size substratecarrier from a large lot size transport system, the large lot sizesubstrate carrier adapted to store more than 13 substrates; and (b)transfer substrates from the large lot size substrate carrier to aplurality of small lot size substrate carriers.
 28. The lithography bayof claim 27 wherein the stocker is adapted to store at least one oflarge lot size and small lot size substrate carriers.
 29. Thelithography bay of claim 27 wherein the small lot size transport systemis adapted to transport small lot size substrate carriers to thestocker.
 30. The lithography bay of claim 22 wherein the small lot sizesubstrate carriers are each adapted to store 6 or less substrates. 31.The lithography bay of claim 22 wherein the small lot size substratecarriers are each adapted to store 5 or less substrates.
 32. Thelithography bay of claim 22 wherein the small lot size substratecarriers are each adapted to store 4 or less substrates.
 33. Thelithography bay of claim 22 wherein the small lot size substratecarriers are each adapted to store 3 or less substrates.
 34. Thelithography bay of claim 22 wherein the small lot size substratecarriers are each adapted to store 2 or less substrates.
 35. Thelithography bay of claim 22 wherein the small lot size substratecarriers are each adapted to store 1 substrate.